芯片制造工艺可以分成两个步骤,首先用热氧化,光刻,掺杂,薄膜制备等常用方法技术,在Si片等半导体衬底上制造各种有源或者无源器件。其二,就是互的英语翻译

芯片制造工艺可以分成两个步骤,首先用热氧化,光刻,掺杂,薄膜制备等常用

芯片制造工艺可以分成两个步骤,首先用热氧化,光刻,掺杂,薄膜制备等常用方法技术,在Si片等半导体衬底上制造各种有源或者无源器件。其二,就是互连布线,也称为半导体的金属化过程,就是在衬底以及元器件的表面淀积金属薄膜,并利用光刻和刻蚀工艺形成金属互连线,把制备好的各种元器件连接起来形成具有一定功能的电路系统,并且系统包含与外电路连接接点。半导体工艺的发展以及特征尺寸的缩小,使得互连引线的宽度、线间距等要素不断增加,互连引线逐渐发展成为多层互连系统,其基本结构如图1所示[1]。多层互连结构可以分为层间介质、通孔、阻挡层和互连金属层四个部分。
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结果 (英语) 1: [复制]
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The chip manufacturing process can be divided into two steps. First, a variety of active or passive devices are manufactured on Si wafers and other semiconductor substrates using common methods such as thermal oxidation, lithography, doping, and thin film preparation. Second, interconnection wiring, also known as semiconductor metallization process, is to deposit a metal thin film on the surface of the substrate and components, and use photolithography and etching processes to form metal interconnection lines, the prepared each Various components are connected to form a circuit system with certain functions, and the system includes connection points with external circuits. The development of semiconductor technology and the shrinking of feature size have made the interconnection lead width, line spacing and other factors continue to increase. The interconnection lead has gradually developed into a multilayer interconnection system, and its basic structure is shown in Figure 1 [1]. The multilayer interconnection structure can be divided into four parts: interlayer dielectric, through hole, barrier layer and interconnect metal layer.
正在翻译中..
结果 (英语) 2:[复制]
复制成功!
Chip manufacturing process can be divided into two steps, first of all, with thermal oxidation, lithography, doping, film preparation and other commonly used methods, in the Si chip and other semiconductor substrates to manufacture a variety of active or passive devices. The second is that the interconnect wiring, also known as the semiconductor metalization process, is the substrate and components of the surface accumulation of metal film, and the use of lithography and etching process to form a metal interconnect wire, the preparation of various components connected to form a circuit system with a certain function, and the system contains connection sinters with the outer circuit. The development of semiconductor technology and the reduction of feature size make the elements such as width and line spacing of interconnect leads increase, and the interconnect leads gradually develop into multi-layer interconnect systems, the basic structure of which is shown in Figure 1. Multi-layer interconnect structure can be divided into inter-layer media, through hole, blocking layer and interconnect metal layer four parts.
正在翻译中..
结果 (英语) 3:[复制]
复制成功!
The chip manufacturing process can be divided into two steps. Firstly, various active or passive devices are fabricated on the Si substrate by common methods such as thermal oxidation, photolithography, doping, film preparation, etc. The second is the interconnection wiring, also known as the metallization process of semiconductors, which is the deposition of metal films on the substrate and the surface of components, and the formation of metal interconnects by using lithography and etching process, connecting the prepared various components to form a functional electrical circuit system, and the system includes the connection points with the external circuit. With the development of semiconductor technology and the reduction of feature size, the width and spacing of interconnection leads are increasing, and the interconnection leads are gradually developed into a multi-layer interconnection system. Its basic structure is shown in Figure 1 [1]. Multilayer interconnection structure can be divided into four parts: interlayer medium, through hole, barrier layer and interconnection metal layer.<br>
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